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Single-Qubit Gates with Errors at the 107 Level

M. C. Smith1,*, A. D. Leu1,*, K. Miyanishi1,2, M. F. Gely1,‡, and D. M. Lucas1,†

  • 1Clarendon Laboratory, Department of Physics, University of Oxford, Parks Road, Oxford OX1 3PU, United Kingdom
  • 2Center for Quantum Information and Quantum Biology, University of Osaka, 1-2 Machikaneyama, Toyonaka 560-0043, Japan

  • *These authors contributed equally to this work.
  • Contact author: david.lucas@physics.ox.ac.uk
  • Contact author: mario.gely@physics.ox.ac.uk

Phys. Rev. Lett. 134, 230601 – Published 12 June, 2025

DOI: https://doi.org/10.1103/42w2-6ccy

Abstract

We report the achievement of single-qubit gates with sub-part-per-million error rates, in a trapped-ion Ca+43 hyperfine clock qubit. We explore the speed and fidelity trade-off for gate times 4.4tg35μs, and benchmark a minimum error per Clifford gate of 1.5(4)×107. Calibration errors are suppressed to <108, leaving qubit decoherence (T270s), leakage, and measurement as the dominant error contributions. The ion is held above a microfabricated surface-electrode trap that incorporates a chip-integrated microwave resonator for electronic qubit control; the trap is operated at room temperature without magnetic shielding.

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