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Benchmarking single-qubit gates on a neutral-atom quantum processor

A. Rozanov1,*, B. Bantysh2,3, I. Bobrov1, G. Struchalin1, and S. Straupe1,2

  • *Contact author: a.rozanov61@gmail.com
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Phys. Rev. A 113, 042603 – Published 7 April, 2026

DOI: https://doi.org/10.1103/vbwh-sk7s

Abstract

We present benchmarking results for single-qubit gates implemented on a neutral-atom quantum processor using direct randomized benchmarking (DRB) and gate-set tomography (GST). The DRB protocol involves preparing stabilizer states, applying m layers of native single-qubit gates, and measuring in the computational basis, providing an efficient error characterization under a stochastic Pauli noise model. GST enables the full, self-consistent reconstruction of quantum processes, including gates, input states, and measurements. Both protocols provide estimations of gate performance robust to state preparation and measurement (SPAM) errors, offering complementary perspectives on quantum gate fidelity. For single-qubit gates, DRB yields an average fidelity of 99.963%. The protocol was further applied to a 25-qubit array under global single-qubit control. GST results are consistent with those obtained via DRB. We also introduce a gauge-optimization procedure for GST that brings the reconstructed gates, input states, and measurements into a canonical frame, enabling meaningful fidelity comparisons while preserving physical constraints. These constraints on the operators, such as complete positivity and trace preservation, are enforced by performing the optimization over the Stiefel manifold. The combined analysis supports the use of complementary benchmarking techniques for characterizing scalable quantum architectures.

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Outline

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Phys. Rev. A 113, 042603– Published 7 April, 2026
  • Received 23 September 2025
  • Revised 2 February 2026
  • Accepted 19 March 2026
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