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Modeling the Impact of Device Imperfections on Electron Shuttling in SiMOS devices

Jack J. Turner1,*, Christian W. Binder1,2, Guido Burkard3, and Andrew J. Fisher1,4

  • *Contact author: jack.turner@quantummotion.tech
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PRX Quantum 7, 033054 – Published 11 September, 2026

DOI: https://doi.org/10.1103/hyfp-rmrr

Abstract

Extensive theoretical and experimental work has established high-fidelity electron shuttling in Si/SiGe systems, whereas demonstrations in Si/SiO2, also known as silicon metal-oxide-semiconductor (SiMOS), devices remain at an early stage. To help address this, we perform 3D simulations of conveyor-belt charge shuttling in a realistic SiMOS device, building on earlier 2D modeling. We solve the Poisson and time-dependent Schrödinger equations for varying shuttling speeds and gate voltages, focusing on potential pitfalls of typical SiMOS devices such as oxide-interface roughness, gate fabrication imperfections, and charge defects along the transport path. The simulations reveal that for low clavier-gate voltages, the additional oxide screening in multi-layer gate architectures causes conveyor-belt shuttling to collapse to the bucket-brigade mode, inducing considerable orbital excitation in the process. Increasing the confinement restores conveyor-belt operation, which we find to be robust against interface roughness, gate misalignment, and charge defects buried in the oxide. However, our results indicate that defects located at the Si/SiO2 interface can induce significant orbital excitation. For lower conveyor gate biases, positive defects in the transport channel can even capture passing electrons. Hence we identify key challenges and find operating regimes for reliable charge transport in SiMOS architectures.

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Popular Summary

Reliable shuttling—physically transporting electrons around a silicon chip—is key to many silicon spin quantum computing architectures. Extensive theoretical and experimental work has established high-fidelity electron shuttling in Si/SiGe systems, whereas demonstrations on the alternative silicon metal-oxide-semiconductor (SiMOS) platform are still in the early stages. To help address this, we perform 3D simulations modeling "conveyor-belt" charge shuttling in a realistic SiMOS device, focusing on common imperfections like interface roughness, gate misalignment, and charge defects. Our findings reveal key operating conditions for success. If the control voltages are too low, the "conveyor-belt" shuttling mode breaks down, forcing the electron to move in a less controlled "bucket-brigade" fashion, leading to orbital excitations. Otherwise, we find charge shuttling to be robust against interface roughness, gate misalignment, and charge defects buried in the oxide. However, challenges arise from defects located at the Si/SiO2 interface, which can induce considerable excitation. At lower voltages, a positive charge defect above the shuttling path can even capture a passing electron, preventing transport. Hence we identify optimal operating regimes and highlight key challenges for reliable charge transport in SiMOS devices.

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PRX Quantum 7, 033054– Published 11 September, 2026
  • Received 10 December 2025
  • Revised 10 April 2026
  • Accepted 6 July 2026
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